Called MCX, the MCUs will span from highly-secured high pin-count processors with 4Mbyte flash and 1Mbyte of sram, to a Cortex-M in a 16pin package – the smallest Electronics Weekly has yet heard of.
Made on a 40nm process and build around Arm Cortex-M33 cores, there will be four fundamental types:
MCX N and A parts are related, and when they have the same number of package pins, will be pin-compatible – “You can migrate up and down easily,” said Phua.
N devices will get “all the security you need”, he said, with Arm’s TrustZone combined with NXP’s EdgeLock-branded secure sub-system, taken from the LPC55S family. MCX A type devices will have a Cortex-M33 without TrustZone, said Phua, and be suited to applications like motor control.
Some of the MCUs will get the first instantiation of NXP’s, specialised neural processing unit (NPU, right), claimed to be over 30x faster with some machine learning workloads compared with the CPU core alone – including Conv2D (3×3 with pad), point-wise convolution and depth-wise Conv2d (3×3).
Although the architecture stays the same, NPU hardware scales across MCX MCUs from 32op/cycle to over 2kop/cycle.
Support will come from the company’s MCUXpresso suite of development tools and software.
Machine learning and run-time inference will be supported by the company’s eIQ software development environment which can train models for the NPU or the CPU core.
With such a broad range of power, performance and security trade-offs, applications are foreseen all over the place. NXP suggests smart homes, smart factories, smart cities and emerging industrial and IoT edge uses.
Find more about MCX microcontrollers and see demos on stand 4A-222 at Embedded World next week in Nuremberg. Or click the MCX product page.
The Electronics Weekly stand is at 4A-628. Come and say hello if you’re at the show.
